PDP 11/45 multi processor systems
tshoppa at wmata.com
Tue Jul 15 14:04:14 CDT 2008
Jim Beacon asks:
> whilst reading my 11/45 processor manual the other
> night, I came across the statement that, if Unibus A and
> B are separated, Unibus B can be used for inter-processor
> links, so long as one of the connected devices is a Unibus controller.
I and John Wilson had wondered about this in the past, and in 2001
John Holden mentioned the following in vmsnet.pdp-11:
> Tom Uban wrote:
>> The 11/45 processor handbook talks about the utility of a multiprocessor
>> system, considering the dual UNIBUS architecture and fast/slow memory
>> I know that many discussions have gone by about a multiprocessor 11/70,
>> but did DEC ever make (internally?), produce, or sell a multiprocessor
>> 11/45 system?
>> Did anyone in put a pair (or more) of 11/45's together on their own?
> I had an 11/45 with a 11/20 front end, but it gets tricky. You can
> separate the two Unibuses (unbusi?) if you have fastbus memory. The
> controllers were dual ported, one to unibus B and the other a direct
> path to the processor. Unibus A was always used by the processor, and
> had the bus arbitration logic. Unibus B had no such logic, and was
> for DMA transfers from peripherals to the fastbus memory.
> If you separate the buses (just remove a jumper), and run a second
> processor on Unibus B there is a problem. The second processor and
> its peripherals have full access to the fastbus memory (only), but the
> peripherals on the 11/45 had no access.
> In my case using an 11/20 (which doesn't have memory management) the
> fastbus memory has to be strapped into the first 56Kb of memory. The
> devices on the 11/45 couldn't have access to this memory, so I had to
> write a special bootstrap loader that buffered data in normal memory,
> then transferred it to the fastbus segment.
> A different hardware solution was the 'Unibus Window', where you could
> transparently map chunks of memory (or peripherals) between to
> unibus machines.
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