Floppy controller Q - VCO Inhibit / VCO Sync, and IBM format

Allison ajp166 at bellatlantic.net
Wed Jul 30 06:36:47 CDT 2008

The 765 does the skip of index gap thing regardless of VCO connection
an that is triggeerd off the index pulse.

VCO inhibit is there to prevent the PLL from trying to track the the mistiming
an index gap can introduce.   Not always required and some VCO designs are 
better behaved.  


>Subject: Re: Floppy controller Q - VCO Inhibit / VCO Sync, and IBM format
>   From: "Chuck Guzis" <cclist at sydex.com>
>   Date: Tue, 29 Jul 2008 14:49:23 -0700
>     To: "General Discussion: On-Topic and Off-Topic Posts" <cctalk at classiccmp.org>
>On 29 Jul 2008 at 20:55, Philip Pemberton wrote:
>>    At the moment it's driven permanently high; this seems to work OK insofar
>> as the sync detector (which is why the datasep is there -- to extract a clock
>> signal for the MFM data stream) will pick up SYNC-A1 signals and the data
>> seems to be valid. What I don't know is if this is how things are supposed to 
>> be done...
>ISTR (and it's been a long time since I read the document) that the 
>later versions of the 765 (765A?) imposes something like a 500 usec. 
>VCO inhibit after the leading edge of INDEX/.  Earlier versions (765, 
>8272) imposed something like a 1000 usec. VCO inhibit.  This can be a 
>real problem if the original disk was not formatted with an IAM, 
>leading to failure to recognize the IDAM for the first sector on the 
>Even so, the 500 usec. "blind spot" exhibited by the 8272A/765A can 
>be a problem for diskettes formatted on other systems where a too-
>short gap occurs before the first sector header.  This leads to all 
>sorts of dodges in reading them on PCs, such as taping over the index 
>hole or tweaking the drive spindle speed down a bit.
>WD controllers of the 17xx family did not do this; you could start a 
>sector very close to the index pulse and still be fine.
>My advice would be to fuggedaboudit, particularly if you want to read 
>diskettes produced on other systems than PCs.
>>    The uPD765 and 827x datasheets are predictably rather sketchy on this 
>> front... All they really say is that the VCO line inhibits the VCO in the PLL, 
>> which would have the effect of allowing the PLL's loop filter to discharge, 
>> and reset it to a predetermined state. What they don't say is under what 
>> conditions the FDC will do that...
>> So I guess the million dollar question is what I should do with said VCO line. 
>> Wire it to /INDEX via an inverter to reset the PLL on every rotation? Or just 
>> wire it to VCC (VCO enabled) and leave it?
>> Thanks,
>> -- 
>> Phil.
>> classiccmp at philpem.me.uk
>> http://www.philpem.me.uk/

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