Emailing: CP-M Z80 home brew computer circuit board.htm
ajp166 at bellatlantic.net
Tue Jun 17 17:31:02 CDT 2008
>Subject: Re: Emailing: CP-M Z80 home brew computer circuit board.htm
> From: "bfranchuk at jetnet.ab.ca" <bfranchuk at jetnet.ab.ca>
> Date: Tue, 17 Jun 2008 10:09:33 -0600
> To: General Discussion: On-Topic and Off-Topic Posts <cctalk at classiccmp.org>
>> Have you ever used 8"SSSD to do anything that required space? There
>> enough space to run a disassembled version of the BDOS through ASM
>> unless you have at least two drives and don't mind doing cleanup.
>I never could run the CP/M system I was using for more than 30 minutes
>the floppy stepper sticking. That was fun working with it.
>Still how do you transfer stuff from a floppy ( or file online ) to a
>CP/M system with no external I/O devices?
Explain no external IO?
A serial line works fine, or a parallel bidirectional port. Since every
cp/m system has a console no rule saus it can transfer files on that line
>> Yes you can roll your own data sep it only needs three ttl packages.
>> With all the other hardware needed for the 765 case you end up with at
>> least 10 chips
>> though If you willing to miss a few features it's been done in 7 plus
>> the FDC
>> and that doesn't include the bus side of the FDC interface.
>That I would like to see.
Goo look at David Dunfield's CUBIX system. CPU is 6809 but the FDC is
765 with minimal interface parts count. I'd say it was a good example
of keep ing the chip count to a minimum.
>> Kicad for linux there are other like cadstd for winders.
>> Of course the last 2901 design I'd done in the early 80s was
>> with paper and pen! It's doable that way.
>I still am using paper & pen. Mind you I have to buy JAPANESE pens
>since the quality of the USA stuff is all cheap Chinese imports.
>Now that I have a serious cad program - DIPTRACE on order
>I think I will put the design in hardware.
I still use paper and pen too. I do everything engineering
notebook style. That is black ink, no erasures and numbered
>> FYI using 250nS eproms will make it terminally slow unless
>> you do two things, use a wide microword 64bits or more and
>> pipeline the address and decode so you can work right to the
>> eprom Tacc minimum limit.
>I got that covered if I read the 2901 data sheets correctly.
>I will be using a 6809 style memory cycle optimized for
>D-RAM access and clock the 2901 in 4th phase of
>the memory cycle. This is retro computing project for the feel
>of the late 1970's not using a 8 bit CPU. I am aming for
>a 800ns memory cycle and the slow access of micro-code
>is not a problem. The only thing pipelined is the next memory
>cycle - Read/Write/Refesh and the default is refresh while
>doing the the 1st cycle of op-code decoding. The front
>panel does RUN/STOP, Single Instruction,Address Load,
Using Dram is one way to make life hard. you can use larger
static devices and save pain but retain the same cycle style.
Last 2901 design was 16bit, horizontal microcode (56bits),
one microword to a cycle. I was able to get the pipeline
for Eprom address latch to overlap so that the 2732s used
would run at 320ns with good timing. The macro cpu executed
instructions in that time cycle in a four tick cycle. It
was fairly fast for a single address machine. However, I
didn't do the microaddress or micro program counter in the
2901 I did that with TTL. No front pannel either the
system booted a rom minimal debugger. When I got it
working I junked it and started thinking about a 32bit machine.
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