KD-11F (11/03) in a BA11-N??
pete at dunnington.plus.com
Wed Jan 7 12:25:05 CST 2009
On 07/01/2009 15:46, Bob Armstrong wrote:
>> Pete Turnbull (pete at dunnington.plus.com) wrote:
>> No, that'll be a BA11-M ...
> Oopss. Sorry.
>> The issue is not the number of address bits, which won't matter at all.
> That's what I was hoping, but there's one thing I don't understand - the
> LSI11 CPU only drives 16 address bits, but some of the option cards (e.g.
> DLV11-E) and the MSV11 memory decode 18 address bits. It's not sufficient
> to simply pull the upper two address bits to always be zeros or ones - the
> upper two address bits have to be zeros (for the memories) when the CPU
> outputs an address in the range 000000..157777, and ones (for the I/O cards)
> when the CPU outputs an address from 160000..177777. It's not a difficult
> problem, but where is the logic to do this? It's not on the LSI11 card,
> since those extra address bits weren't even defined in the QBUS when this
> card was made.
Actually it *is* on the card, just not in the form you might expect.
All I/O page access on a QBus is controlled by a separate signal called
BBS7 (Bus Bank Select 7) and I/O page devices respond to that being
asserted, not by actually decoding the upper address bits (which they
ignore). However, a consequence of that is that cards which do decode
18 address bits (like an MSV11-D) is that they may respond to addresses
which are in the I/O page in a 16-bit system -- in other words, a 64KB
(32KW) MSV11-D with a base address of 000000(8) responds to all
addresses from 000000(8) to 177777(8). It has a jumper to disable the
top page. Maybe you need to do that?
>> It's that your H9273 backplane is set up for an 11/23 and won't have
>> W2 and W3 inserted, but they need to be for a quad-height M7264 ...
> Actually the BA11-N H9273 does have W2 and W3 installed - according to the
> Microcomputers and Memories handbook, those are supposed to be installed if
> the CPU is in slot one, and removed if there's no CPU (i.e. for an expansion
> box). It doesn't actually say anything about which model CPU, but in any
> case they are installed on mine. Do they need to be _removed_ for an M7264?
No, they don't need to be removed, but they should normally only be
installed for a quad CPU. They connect two fingers on the upper side of
section C to the corresponding fingers on the lower side.
> So is W1 (installed) for that matter, which I think controls the LTC.
Yes, that's right (and normal), though it should be removed in all but
the last box in a multi-box setup.
Pete Peter Turnbull
University of York
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