yet another pdp-8 in a fpga, but this time running tss/8
jws at jwsss.com
Sat Jun 5 19:22:47 CDT 2010
Great job, Brad.
I downloaded your drop, and am looking at it and admit I don't know
anything about verilog. I see that you used gpl-cver, and found a
version of it available to look at the verilog stuff. It seems to work
okay, but I might caution anyone who downloads it not to try to run it
as 64 bit, the outfit who developed it uses code which does not work in
In one of the scripts, run_rf.sh, there is a line which seems to want to
load a pli "so" file, which is not included with the cver. The download
I got has only what seem to be include files for the pli, and your
reference implies there was more there.
Can you or someone share what else I'm missing to try this.
Very interesting and thanks,
On 6/5/2010 10:45 AM, Brad Parker wrote:
> I know it's crazy, but I finally got my FPGA based PDP-8/I to boot TSS/8.
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