MIPS CPUs

e.stiebler emu at e-bbes.com
Thu Mar 25 11:53:06 CDT 2010


Philip Pemberton wrote:
> I've got a few 'suspended projects' that would benefit from having a 
> reasonably fast (~100MHz would be nice, ideally with a bit of I-cache 
> and D-cache), 32-bit RISC CPU core with decent compiler/RTOS support. 
> Ucore seems to fit the bill (although there are reports that it doesn't 
> work properly) but the "older version" of the code has support for 
> instruction or data caching :( :(

Did you check YARI ?



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