1103s

[Chuck Guzis]

On 18 Nov 2010 at 21:25, Tony Duell wrote:


> But does it still make sense for semiconductor memory? Are there
> worst-case read/write sequences for SRAM or DRAM? I've certainly never
> seen a data sheet which mentions them. 

They exist, but are used by manufacturers, not customers to sniff out 
problems in the chip design, such as unwanted crosstalk.  Most of the 
online cites I can come up with are behind subscription walls, but 
look at US patent 7370250, for example.

Of course, that's not to say that even if the chip itself passes 
worst-case tests, the memory array will.  Problems with crosstalk, 
decoupling, address-line drivers, etc.  all make for an interesting 
life.

--Chuck