And speaking of ALGOL
jnc at mercury.lcs.mit.edu
Tue Aug 11 16:13:44 CDT 2015
> From: Paul Koning
> Every machine needs a fast memory system. CISC machines just as much,
> after all the number of memory references per operation of a given kind
> doesn't depend on the sort of CPU architecture you use.
You're forgetting the memory bandwidth for the instruction fetching. RISC
machines execute a stream of simple, low-level instructions, whereas CISC
machines tend to do fewer, (semantically) higher-level operations - and in
the process, use less memory bandwidth for instructions.
To be tedious (sorry), for example, instead of of the RISC instruction
sequence 'move register Ra to Rt1; add constant X to Rt1; move mem loc (Rt1)
to Rt2; add Rn to Rt2; move Rt2 to mem loc (Rt1)', a CISC would just do 'add
Rn to mem loc X[Ra]'. Same number of _data_ reads/writes, but a very different
count of instruction fetches.
The CISC tradeoff (fewer, slower, instructions) made sense 'back in the day',
and not just for memory bandwidth - it made for more compact code, back when
memory was in very short supply (by today's standards).
Now, of course, a number of technological changes - primarily multi-level
caches - have changed the 'sweet spot' for optimal instruction complexity,
while keeping the memory bandwidth needed for instruction fetches down.
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