11/45 hack?

Noel Chiappa jnc at mercury.lcs.mit.edu
Thu Feb 12 16:11:07 CST 2015

    > From: Eric Smith

    > The memory controller does have a Unibus port, but the Fastbus memory
    > modules are not on the Unibus any more than an RP04 disk drive is on
    > the Unibus.

Ah, OK, I guess it all depends on exactly what one means by 'directly'... :-)

I was using it in a high-level architectural sense: there's a 1:1
correspondence between UNIBUS addresses and Fastbus memory addresses; a
UNIBUS read/write cycle completes immediately with the contents of that cell;
etc - all quite different from the RP0x example. IOW, at a very high level,
it looks like other 'memory on the UNIBUS'.

    > To a first approximation, the two Unibuses are *always* jumpered
    > together.

I seem to recall reading (don't remember where, it was a long time ago) of
some place that actually made use of the dual UNIBUS thing; they hung some
other PDP-11 (don't recall what kind) off UNIBUS B, and ran a primitive
multi-processor. It was some sort of high-speed data acquisition, or perhaps
a real-time simulator - something like that.

Anyone else know of any place that used the dual UNIBUS capability?


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