Possible error in "Microcomputers and Memories" (1982 edition)

Noel Chiappa jnc at mercury.lcs.mit.edu
Tue Feb 17 14:35:24 CST 2015

So the description of the SSR3 register in "Microcomputers and Memories"
(1982), on pg. 284, apparently has an error. It describes bit 5 as "enables
I/O mapping", but.... the QBUS 11's don't have any kind of I/O mapping that I
know of. Or am I confused?


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