Weekly Classic Computer Trivia Question (20150112)
rick at rickmurphy.net
Mon Jan 12 21:20:21 CST 2015
At 09:36 PM 1/12/2015, Johnny Billquist wrote:
>On 2015-01-13 03:19, Rick Murphy wrote:
>>At 01:17 PM 1/12/2015, Johnny Billquist wrote:
>>>And of course, you also have things like OS/8, which runs with
>>>interrupts off at all times, to which the answer to the original
>>>question would be "OS/8". :-)
>>The OS/8 FORTRAN runtime (FRTS) runs with interrupts enabled. OS/8 in
>>general doesn't care if interrupts are on, which is how OS/78 (or was it
>>OS/278?) symbionts worked. So, you can't blame OS/8 for getting into the
>>way. There's nothing typically in OS/8 that requires interrupts to be
>>disabled, but it's true that most of OS/8 doesn't do anything to handle
>Well, not entirely true. Yes, FRTS runs with interrupts enabled. But
>it disables them before jumping into OS/8, unless I remember wrong.
Well, not entirely relevant. You recommended that I 'Read the thread'
but I did. I'm responding to the misinformed statements that OS/8
always runs with interrupts disabled, which is false. FRTS basically
requires that I/O drivers be set up before execution starts, so no OS/8
I/O handlers are called once the runtime gets running (assuming just
ADVENT does dynamic unit assignment, and wraps OS/8 USR calls to
>It's been a very long time since I mucked around inside FRTS...
It's been a few months or so for me :) And yes, OS/8 drivers can be
called with interrupts enabled.
>>Interrupt latency? Either you're looking for the length of the "skip
>>chain", or interrupt blockers like CIF instructions.
>Continue reading the thread. Seems he's looking for the hardware
>response to the raising of the interrupt pin on the CPU, and I assume
>under the condition that interrupts are enabled.
I've read the thread, which is why I brought up the CIF stall, since
nobody else has mentioned it.
Maybe that's not what's being asked here, but if you're asking what can
cause latency with interrupts enabled once a device generates an
interrupt, the fact that CIF instructions delay interrupts until the
next JMP instruction seems to be what's being asked here.
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