PDP-12 at the RICM
cisin at xenosoft.com
Wed Jul 15 12:44:09 CDT 2015
>>>>> The 8086 had four segment registers:
>> . . .
>> That certainly sounds reasonable, but,
>> have you noticed the difference in behavior of 8086/8088 V 80386?
> Haven't. The SDM covers Pentium forward (and even then it attempts to
> document the differences between the different models). I think
> anything prior to that has been relegated to "incompatible" prior
> products if their behavior is different from what is described.
Yes, anything ON-topic here is "incompatible" by now. :-(
Both REP and segment override were prefixes to the instruction.
On the original 8086/8088, on return from an interrupt, it only saw ONE of
the prefixes! In the usual sequence of prefixes, when it came back from
an interrupt, only one more REP! Although by rearranging the prefixes, I
s'pose that it could do the whole loop with the wrong segment.
I don't know the exact point when they fixed that. I'm pretty sure
that it was fixed by the 386, maybe even earlier. It's also possible
that NEC might not have copied that bug.
Hence, my comment asking whether an emulator should copy the behavior,
or what the system SHOULD do.
At one time, there was no practical way to identify which processor your
code was running on ("well, open the lid and look!"), so processor
identification was by trying various quirks and bugs, checking the size of
the prefetch buffer, etc. I remember an article in Micro-Cornucopia? that
mentioned some techniques and implied that they were intel provided. The
author was on holiday, so I called intel. It took a lot of transfers to
even find somebody who understood the reasons for wanting to know! But,
then he asked that if I found the "official" methods, to let him know.
> The 8086/8088 were done in a similar vein to the 8080 and 8008. Not
> too much attention was paid to forward looking architectural decisions.
> The 80386 and follow on CPUs *tried* to look forward a bit but it wasn't
> really serious until the Pentium when features such as the TSC and APIC
> were introduced.
Intel seems to have always been looking in the rearview mirror to
maintain backwards compatability/upgrade-ability, rather than looking
ahead. New processors from intel could handle the previous round of
software with minimal changes, as compared to opposed to Motorola's
"redesign from scratch" (to "get it right")
Grumpy Ol' Fred cisin at xenosoft.com
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