using new technology on old machines
dave.g4ugm at gmail.com
Wed Jun 17 06:28:15 CDT 2015
> -----Original Message-----
> From: cctalk [mailto:cctalk-bounces at classiccmp.org] On Behalf Of Brent
> Sent: 17 June 2015 09:13
> To: General Discussion: On-Topic and Off-Topic Posts
> Subject: Re: using new technology on old machines
> On 2015-Jun-16, at 3:35 PM, Dave G4UGM wrote:
> >> -----Original Message-----
> >> From: cctalk [mailto:cctalk-bounces at classiccmp.org] On Behalf Of tony
> > duell
> >>> .. its also a nasty hybrid design with DC biased NPN and PNP
> >>> transistors. I find it ugly and can see it being a pig to debug,
> >>> though it simulates fine in LTspice...
> >> I didn't find it that hard to basically understand in my head. After
> >> all,
> > there
> >> are only 4 transistors, and 2 of those are just an output buffer.
> >> Quite
> > why
> >> having both NPN and PNP transistors makes it harder to understand I
> >> do not know.
> > I am really used to RF circuits so am puzzled there is no inductor. It
> > kind of looks like a Darlington Pair but it isn't.
> > What I don't understand is why the emitter of Q1 is spliced in what I
> > assume is a voltage divider in the collector of q2.
> > I was expecting a multivibrator circuit...
> I think you could characterise it as:
> - Q1 & Q2 form a two-stage direct-coupled non-inverting amplifier
> from Q1-B to Q2-C.
> - C5, the main timing cap, is thus effectively in AC positive
> as one would expect for an oscillator.
> - R9 (the R between Q2-C and Q1-E you were questioning) provides
> DC negative feedback,
> presumably to help stabilise and fix the circuit characteristics,
> some measure of stability is going to be
> needed for a baud-rate generator. Note it also has it's own
> regulator in D1 to D4.
I found it easier to think of it in DC terms. So the Cap charges through R5
+ R3 and R9 + R8.
As the Cap charges the voltage on the base of Q1 rises until it turns on,
which then turns on Q2.
At this point the cap is then charged (or discharged) in the reverse
direction via Q2, D5 and R4 until Q1 turns off.....
> At first glance I thought R9 might be there to provide some hysteresis in
> switching thresholds for the RC charge/discharge but it looks like it acts
> opposite direction to that.
> The base circuit of Q3 (the first stage of buffering) will draw current
> high-impedance side (R8,R9) of the oscillator output, pulling up the C5,R9
> junction when Q2 is off, so it will probably affect the oscillator and be
> necessary to get the 'proper' functioning of the oscillator portion of the
I included that in my LTSpice model....
... but it doesn't actually have that much effect...
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