bqt at update.uu.se
Sun May 17 18:35:37 CDT 2015
On 2015-05-18 00:16, Noel Chiappa wrote:
> > From: John Wilson
> > Even if E11's mP feature is officially unsupported, it was a *crazy*
> > amount of work
> What made it so much work? (Just curious about the technical aspects...)
John really needs to answer this one, as I think only he knows the
innards of E11.
However, I know at least parts of the story, as related to how RSX
works. Part of the problem is just memory coherency. The 11/74
essentially guarantees memory consistency. If you write to a memory
location from one CPU, it is immediately visible from all CPUs. At the
same time, the 11/74 do not have any cache coherency. I believe in
general, you can accept the memory coherency of modern systems as an
acceptable alternative, since they essentially just gives you more
But it still needs examination and evaluation.
A second problem is how interprocess communication works. The 11/74 have
a special device which takes care of this. It have something like a door
bell for each CPU, and when one CPU wants to get the attention of
another CPU, this device is used. It causes an interrupt on the second
CPU, and it is then expected to figure out why it was knocked on, and
acknowledge the request before the requesting CPU times out. This
timeout is essentially done through a spin lock with a counter.
On modern machines, this counter runs way faster than on a real 11/74.
In addition, the time spent on each thread, which implements the
individual CPUs, might not match 1:1 to actual CPUs. So, in essence, the
requesting CPU could be doing a whole lot of work before the requested
CPU even gets to execute a single instruction. This will cause the
interprocessor interrupt to time out in RSX. So, when the IIST
interprocess interrupts are used, you need to somehow make sure that all
CPUs will execute some code before the requesting CPU might time out.
That is not trivial to accomplish.
Third, the actual IIST device documentation was not available when the
E11 implementation was done, so it was a lot of reverse engineering
based on how RSX use the device.
Fourth, some other bits and pieces of an 11/74 also exists and are
different from other 11/70 systems (not to mention any other PDP-11).
E11 don't do all of them correctly either, such as the MKA-11 memory
boxes, which have their own CSRs.
Also, not all parts of how an 11/74 system works are really that clearly
understood. For example, an 11/74 can start and stop individual CPUs
while the system is running. Exactly how is this done? They obviously do
not have normal M9312 bootstrap cards with standard boot roms, since
that would not work. An 11/74 do have four separate consoles (if we have
four CPUs), and four separate Unibuses. Also, four separate front
panels. This also means that the same CSR addresses can be used by
several devices, if they are on different buses. This also means that
all device emulations also needs to now be aware of which bus they are
I guess the list goes on... :-)
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