M8192 KDJ11-A ZKDJB2 XXDP Test Failure
holm at freibergnet.de
Mon Sep 14 10:09:37 CDT 2015
Jay Jaeger wrote:
> I have fiche for ZKDJB0, and fortunately it seems to match at this
> particular error and address.
> "This test looks for BEVENT to Interrupt when BIT 6 in the BEVENT
> Control register is set and interrupt priority level is set to 5".
> The particular error that you identify occurs as the result of an EMT
> trap anywhere during the test. However, the most likely error would be
> that the BEVENT interrupt did not occur. It would seem that the most
> likely cause is that you have not configured the LTC clock interrupt -
> but I am on my way out the door so I don't have time to look at the
> KDJ11 manual to confirm this.
Ok, that could be possible. So far as I know there is a jumper on the Front
Panel PCB where one ca disable the LTC signal. I had an KDF-11 previously
in this crate and I think to remember that LTC maked some trouble in some
circumstances. I'll chack that...
> You can bypass this test by setting bit 10 of the XXDP switch register
> to 1. This is something you don in XXDP *before* you start the test
> program (before you enter the "R" command).
Hmm.. most programs display something like "SW=000000 New Value=?", the
ZKDJB2.BIC does not, but it is described this way in the manual..
Thanks anyway, I'll check this..
Technik Service u. Handel Tiffe, www.tsht.de, Holm Tiffe,
Freiberger Straße 42, 09600 Oberschöna, USt-Id: DE253710583
www.tsht.de, info at tsht.de, Fax +49 3731 74200, Mobil: 0172 8790 741
More information about the cctech