VAX 730 was Re: Self modifying code, lambda calculus - Re: ENIAC programming
north at alum.mit.edu
Sat Sep 19 01:37:09 CDT 2015
On 9/18/2015 10:15 PM, tony duell wrote:
>> Simple answer. The control store functionality had to fit in the available space
>> on one hex
>> sized card, and 16K density DRAM was the only option. Allocating additional
>> space to use
>> 4K or 1K SRAM would have pushed the CPU design to an additional board, which was not
>> a design option at the time.
> The 11/730 was released in 1982 (according to Wikipedia which I don't take a gospel, but
> I have no other source of information for this). The PERQ 1a was certainly out by then, it had
> a control store using 16K*1 SRAM chips. OK 20 pin as against 16 pin packages, but I don't
> think the 11/730 boards are that tighly packed (anyway, using SRAM would probably have
> eliminated some support devices like address multiplexers).
Yes it was released in mid--1982 (that is correct) but the architecture started
in 1977 and the first proto was built in 1979. By 1980 the design was finalized
and multiple copies were being built and distributed to software development.
Page 8 has a detailed timeline. So the 730 was implemented based on the
technology available in late 79 or so.
The biggest risk I remember from the 730 design (I worked in the same hardware
lab, different project: 11/74 CIS) was the extensive use of PALs. This was the
first (I believe) project at DEC to use them, and they were basically buying all
the devices MMI could produce. It was one of the limiting factors determining
the number of prototypes that could be built.
Other projects (like the one I was working on) wanted to use PALs, but we
couldn't because they were all allocated to the 730 project.
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