VAX 4000-100 QBUS cables
Maciej W. Rozycki
macro at linux-mips.org
Mon Nov 28 11:29:56 CST 2016
On Mon, 28 Nov 2016, Pontus Pihlgren wrote:
> > FYI, the VAX 4000-100/105/106 (KA52/KA54/KA54) systems have no backplane
> > of any kind and do not use Q-bus internally, except for the CQBIC (CVAX to
> > Q22-Bus Interface Chip) ASIC directly bridging one of the NCA (NDAL to
> > CDAL Adapter, or the north bridge in modern speak) ASIC's CP peripheral
> > buses to a mainboard Q-bus connector further wired with an internal cable
> > assembly to the pair of external connectors mounted on the backside of the
> > enclosure.
> Thanks for clearing it up. Uhm, stupid question perhaps. But what is the
> CDAL, and what is it's role?
CDAL aka CVAX Data and Address Line bus is the original CVAX processor
In the NVAX chipset used with the 4000-100/105/106 systems apart from the
CPU(s) the NDAL host bus has two other devices only: the NMC ASIC (NVAX
Memory Controller) and the NCA ASIC (as above; also termed NVAX I/O
Adapter sometimes). The NMC bridges two separate CDAL buses, called CP1
and CP2, which let connect original CVAX peripherals unmodified (so e.g.
the 4000-60's TURBOchannel adapter which interfaces to CDAL can be used
unmodified in the 4000-90/90A/96 systems, which use the same NVAX
chipset). There's a further bridge downstream on one of the CDAL buses,
CEAC (CDAL to EDAL Adapter Chip), which interfaces 16-bit peripherals.
Have a look at VAX 4000-100/105/106 documentation for a block diagram,
which will serve you better than this textual description.
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