Meaning of "architecture width" - Re: 68K Macs with MacOS 7.5 still in production use...
cclist at sydex.com
Fri Sep 16 20:45:47 CDT 2016
On 09/16/2016 05:37 PM, Cameron Kaiser wrote:
> I don't think this follows. Looking at the TMS 9900 datasheet, the
> block diagram shows a full 16 bits on each ALU input and 16 bits
> leaving it. There's no 1-bit bus directly to memory.
So the "bitedness" is determined by the memory bus? e.g., a 68008 is an
The PB250 is serial throughout--the registers are implemented as 1 bit
recirculating devices that are 22 bits in length. Memory is addressable
in 22 bit words (no shorter unit of addressing is present) and is again,
loops of recirculating serial data. Basic operations are performed on
22-bit words. FWIW, it's a one-plus-one instruction set.
My point being that it's a slippery concept that can mean a lot of
different things, depending upon who's doing the calling.
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