Electronic Systems TRS-80 Serial I/O Board?
spacewar at gmail.com
Tue Jun 13 19:29:36 CDT 2017
On Tue, Jun 13, 2017 at 5:53 PM, Chuck Guzis via cctalk <
cctalk at classiccmp.org> wrote:
> The TR1602 UART, like its cousin, the AY-3-1013 used in the TVT,
> tolerates a pretty wide range of bit rate distortion. The app note
> gives a figure of something like 49%. And, since it's async, the game
> starts all over at the next character.
It's mathematically impossible for a normal UART [*] to handle 49% timing
error. The cumulative timebase error by the end of a character can't be
more than one bit time, or the wrong bit will get sampled, resulting in
incorrect data, or, (if that happens on the stop bit) a possible framing
error. For 8N1 [**], there are 10 bits in total (including start and
stop), so that's an absolute maximum timing error of 10%, but for various
reasons even 10% speed variation won't actually work in practice. If they
meant 4.9%, that is believable, but even that won't work if the other side
is more than slightly off-speed in the other direction. Normal spec is a
maximum timing variation of within +/-2% at each end [***], so that things
still work properly if one side is at +2% and the other is at -2%,
> Maybe DEC wasn't using the same sort of UART; I don't know.
I'm pretty sure it was a common UART. DEC invented the electronic UART,
though it was originally two DEC System Modules, effectively a UAR and a
UAT. They worked with Western Digital to have the first single-chip UART
developed, resulting in the TR1402A. Almost all other UARTs were designed
to be compatible with the TR1402A.
* I refer to a "normal UART" as one that oversamples the receive data
signal (typically at 16x the bit rate) to find the leading edge of the
start bit, delays 1/2 bit time, then samples the start bit and subsequent
data bits at one bit time intervals. That is how nearly all UART chips
work, since the very first ones. This analysis is disregarding various
"auto-baud" techniques, which are not performed by normal UARTs, and
certainly not by the TR1602 or AY-3-1013.
** Seven-level mechanical teleprinters, such as the Teletype Model 33, use
two stop bits, and may substitute parity for the 8th data bit, so they have
a total of 11 bits per character, and thus can actually tolerate slightly
less timing error than a UART configured for 8N1.
*** Various sources make different claims regarding allowable variation;
some claim only 1%, but in general 2% is workable. The ITU-T V.14 standard
for transmitting async data over synchronous modem modulation, as used in
all standard full-duplex modem protocols for 1200bps and over, specifies a
basic range of +1% to -2.5%, and an extended range of +2.3% to -2.5%. They
specify the two ranges because the methods necessary to deal with the
extended range introduce issues that can negatively affect the operation of
some equipment. For instance, the NEC uPD7210, used in among other things
the AT&T 7300 & 3B1 "Unix PC", is unable to handle V.14 stop bit shaving.
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