Electronic Systems TRS-80 Serial I/O Board?

Jon Elson elson at pico-systems.com
Tue Jun 13 22:33:20 CDT 2017

On 06/13/2017 07:59 PM, Chuck Guzis via cctalk wrote:
> Well, I didn't say "timing error", I did say "timing 
> distortion", which is not quite the same thing. My 
> reference was the "TR1602/TR1863/TR1865 MOS/LSI 
> Application Notes Asynchronous Receiver Transmitter", 
> which can be found in the WD 1984 Data Communications 
> Handbook (I think there's a copy online). Page 126-127. 
> "Thus, signals with up to 46.875% distortion could be 
> received."
Well, I think it is wild market-speak inflation.  Yes, if 
everything else was perfect, then as long as the serial data 
was at the correct level while the UART sampled the signal, 
the rest could be garbage. But, how will a seriously 
degraded channel ALWAYS pass the signal correctly just when 
the UART samples it?  NOT very likely.


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