Electronic Systems TRS-80 Serial I/O Board?

Eric Smith spacewar at gmail.com
Wed Jun 14 19:26:30 CDT 2017


On Wed, Jun 14, 2017 at 6:14 PM, jim stephens via cctalk <
cctalk at classiccmp.org> wrote:

> FWIW the send and receive clocks are separate on the 1602 Uart.
>

That is true of all traditional UARTs.  For fancier parts intended for
direct connection to microprocessor buses , some have separate clocks,
others don't. Some bond options for Z80-SIO have separate clocks for first
channel, combined clock for second channel, because the Z80-SIO really had
41 signals, and compromises had to be made to put it in a 40-pin DIP.

Separate rx and tx rates was important when using a modem with asymmetric
rates, like Bell 202, which was 1200bps in "forward" direction and 75bps in
reverse direction.  That mostly went away when synchronous modem
modulations came into vogue, e.g., Bell 212 and V.22, for 1200 bps full
duplex, and most things after that.

Even when synchronous modem modulations started having different rates in
the opposite directions again, e.g., V.90 and V.92, using a single bit rate
on the electrical interface to the modem for both rx and tx had become so
ingrained that no one seriously entertained the idea of going back to split
rates on that interface.  The problem is solved (usually) by flow control.


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