Which Dec Emulation is the MOST useful and Versatile?
cube1 at charter.net
Sat Oct 28 20:55:52 CDT 2017
On 10/27/2017 1:46 PM, ben via cctech wrote:
> On 10/27/2017 9:27 AM, Jay Jaeger via cctech wrote:
> With some FPGA venders you could get a TTL library components,
> so you could input older designs. You may have to dig around for them
> because that is not a NEW selling feature any more. Also logic
> cells don't have asynchronous set and clear anymore.
I suppose, though writing a little HDL to provide the function of a TTL
gate isn't very hard. As it turns out, the design I replicated from my
college days was actually DTL, rather than TTL. The lab consisted of 4
19" racks with interconnecting, differentially driven cables. Each rack
had a card cage, and interconnections were done using re-purposed IBM
unit-record plugboards. The current project, the IBM 1410, was
originally designed using IBM SMS - discrete transistors.
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