Core memory emulator using non volatile ram.
jnc at mercury.lcs.mit.edu
Tue Dec 18 18:30:55 CST 2018
> From: Paul Koning <paulkoning at comcast.net>
>>> core memory details such as destructive read weren't visible to the
> DATAIP/DATAO on the Unibus doesn't depend on the destructive read
Yes, the CPU can't tell what the memory is doing.
> The reason it existed is that it allows core memory to optimize the
In other words, it's only there to allow the CPU to act in a way that works
well with core memory. Whether that means that the way core operates is
"visible" to the CPU is a debate about definitions.
Put it another way - do any modern CPU's do 'read-modify-write' cycles (other
than for interlocks in a multi-CPU system)?
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