Strange third party board in PDP-11/45

Noel Chiappa jnc at mercury.lcs.mit.edu
Wed Jul 25 06:53:42 CDT 2018


    > From: Mattis Lind

    > I will take a picture of the boards in more detail so we can figure out
    > what they are doing later on.

Thanks, that would be really useful.


    > My understanding is that slot 1AB and slot 26 AB is tied to each
    > other. So if there would be no expansion unibus there should be a M930
    > in each of these slots. The same goes for slots 27AB and 28AB.

Right, that's my understanding too.

There's a diagram in the "PDP-11/45 Maintenance Reference Manual" (October,
'73 edition, on pg. 60 - pg. 66 of the PDF), which gives:

- slot 1 - UNIBUS A termination
- slot 26 - UNIBUS A cable
- slot 27 - UNIBUS B cable
- slot 28 - UNIBUS B termination

and my read is that the slot 26 cable is 'out to any UNIBUS memory, etc',
while the slot 27 cable is 'in from the other machine in the dual-processor
system'.

(There's an interesting discussion in, IIRC, an RH11-AB - the dual-UNIBUS
controller for the MASSBUS - tutorial manual which talks about the M9300,
which is a terminator which can produce an NPG in response to an NPR; that is
used when people want to attach the RH11-AB's second UNIBUS to the UNIBUS B,
when there's no CPU on it. So the M9300 would go in slot 27, and the cable out
to the RH11 in slot 28.)


    > I cannot see how a device in slot 26AB or 27AB would be able to
    > intercept MSYN here.

Not _in_ slot 26 or 27, it's in the cable _between_ them! :-)

Look at the common case, where UNIBUS A and B are connected: MSYN comes out
of the CPU in slot 26, is jumpered across to slot 27 by the M9200, is carried
across the backplane to slot 28, and then out (on either a BC11 or an M920).

That dual-card thingy that comes with the Cache/45 would allow (if my surmise
about what's going on is correct :-) the Cache/45 to place itself _between_ the
MYSN out of the CPU (in slot 26) and the 'MSYN out to the rest of the system'
(in slot 27).

That does mean no separate UNIBUS A and B. But if my supposition as to how the
Cache/45 works (that it fills itself by snooping on UNIBUS B in the MS11
controller slot) is correct, UNIBUS A and B would have to be connected
together _anyway_, for that to work.

(I _can_ imagine how to do it all without joining the two UNIBI together, but
I will skip that for now.)

	Noel


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