PDP-11/45 RSTS/E boot problem

[Noel Chiappa]

    > From: Fritz Mueller 

    > The most efficient way I think would be to work up a simple LDA loader
    > that would fit in a boot sector, and load a diagnostic from contiguous
    > disk starting at the second sector. It would then be easy to blast down
    > just the boot sector and a single desired diagnostic

Yup, an .LDA loader wouldn't be hard.

    > The good news is that my enhanced diagnostics now detect failures in
    > the same physical banks and with the same bits

Excellent! I imagine you're busy with a soldering iron at this moment? :-)

Once those are fixed, it will be interesting to see if the problems you saw
with the OS's go away.

It'd be easy to hack V6 to turn on parity error detection, if you'd like to.

    > Will have to see after I make the next round of repairs if there are
    > still additional problems that the MAINDEC flags that my simplistic diag
    > isn't shaking out.

It will be interesting to hear those results...

    > I've also been somewhat surprised by the level of repair needed on this
    > memory board. So far, I've seen 6 failed 4116 out of an array of 144
    > total, so about a 4% failure rate. Is this typical for vintage 4116

I don't know about 4116's, but I've seen a fairly high failure rate on _some_
cards with 256K DRAM's - on one board, a couple of chips totally dead, some
others with just _some_ bad bits. Other cards were totally fine. I suspect it
depends on the chip manufacturer.


    > Might be just a fastbus thing?

Could be - I'm not too familiar with the Fastbu.

    > It's also hinted in paragraph 7.7.7 of the older KB11-A maintenance
    > manual .. This particular text is removed from the later KB11-A,D
    > maintenance manual, and the description there seems to imply all reported
    > parity conditions trap directly to 114.

Ah... Looking at the "pdp-11/45 processsor handbook", 1972 and 1973 editions,
there's an "Appendix E: Memory Parity" (of which I was previously unaware!),
referred to in "2.5.6 Memory Parity". (I haven't checked to see if later ones
have it.) It claims there are "16 memory status registers ... each one
associated with an 8K section of memory". (It doesn't say whether UNIBUS
memory, Fastbus, or both!)

One bit in each register claims to be 'Halt Enable': "[when] set, the machine
will execute a halt if a parity error occurs"; when clear, it traps to 4!
Even better, it claims to be able to control whether the memory uses odd or
even parity! (How, for UNIBUS memory, I don't know - there's no way to do
this over the UNIBUS. And the MM11-L and MM11-U manuals indicate they both
use odd parity, although there's a CSR bit to allow wriring 'wrong' - i.e.
even - parity.)

Very odd. Maybe this was deleted in the hardware (or they decided not to do
it), and someone forgot to follow through in the manual? I recently found
another reference to a /45 CPU feature I'd never heard of - forget what it
was, alas!


    > surprisingly, neither one of my M8106 has either a jumper or the
    > indicated pull-up at that location! .... The fact that W1 exists on the
    > M8119 is interesting; maybe the situation is that the prints are for
    > later revisions, and my actual M8106 are earlier?

Could be. I wonder if there's any way to get ahold of the ECO list for that
card?

	Noel