RSTS processor identification
jnc at mercury.lcs.mit.edu
Sat Mar 6 12:56:26 CST 2021
> From: Paul Koning
> Here is an outline (not all the details) of the hardware scan flow:
> 2. Make sure the MMU exist; if not, halt.
> If it has FIS, it can only be an 11/40.
You probably know this already, but the KEV1-A floating point chip for
the LSI-11 also implemenred FIS. (Of course, the LSI-11 would fail
step 2, so it's not really a factor here.)
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