IBM 1410 FPGA Implementation Update - new github repository

[Jay Jaeger]

The last 12 months I have been pretty busy working on my 1410 in FPGA 
project, and there is now more to share, though I have not done much 
actual work since February - been too busy playing with other "toys".  8D

First, I finished working through all of the IBM 1410 and IBM 1415 
Automated Logic Diagrams - generating VHDL and testing the results with 
test benches.  [Note that this includes the built-in 1401 compatibility 
mode, activated at the flip of a switch.] That took most of 2020.

So, the CPU generation in VHDL is now more or less complete, and I added 
a hand coded memory module for memory, as core is kind of hard to find 
on an FPGA development board.  ;)  I am currently using a Digilent Nexys 
4, but I think it might have even fit on a Nexys 2 - there is plenty of 
room to spare, and there isn't anything in the VHDL aside from, maybe, 
the memory implementation (though even that is pretty generic VHDL).

With this the CPU runs, at the very least, Unconditional branch (Jump), 
Halt, NOP and Set Word Mark instructions seemingly correctly - I haven't 
tried any others.  Somewhat surprisingly, aside from issues with the 
hand coded VHDL in triggers and the need to communicate pins tied to 
logic one or zero, the auto-generated VHDL works untouched.

I have updated the github repository for the C# database application 
that generates the VHDL from time to time (and which includes the 
complete database) at http://github.com/cube1us/IBM1410SMS

There is now a *new* repository, http://github.com/cube1us/IBM1410FPGA 
which holds the generated VHDL, some hand coded VHDL modules for certain 
SMS cards (typically for triggers, for example), the console and test 
benches I used along the way, and VHDL "Integration Tests" which are 
designed to be loaded onto the board - the current one being 
IntegrationTest3.

There will be, eventually, a third repository which will contain the C# 
code that "hosts" the IBM 1410 console and peripherals, communicating 
with the FPGA over a high speed serial over USB connection.  I figured 
out that this should allow me to emulate peripherals without having to 
resort to sending data over Ethernet, SPI, I2C or the like.  I have just 
started that, so it really isn't at a point that there is much to share.

Once I have a console working (which will require a re-do of the console 
VHDL implementation, which right now communicates in ASCII, but should 
probably be using BCD), I should be able to pre-load into memory some of 
the CPU diagnostics, by loading a diagnostic routine into either my 1410 
simulator (http://github.com/cube1us/1410), or Richard Cornwell's 
emulator in SimH and then taking a snapshot of "core" to pre-load into 
the FPGA.  At that point I expect I will be able to test the CPU pretty 
thoroughly.  I hope and expect that will happen this year sometime.

Unfortunately, I do not have the ALDs (Automated Logic Diagrams) for the 
IBM 1414 I/O Synchronizers, but I do have the Instruction Logic Diagrams 
which should allow me to code VHDL to emulate card, tape and maybe 
eventually even disk functions, so those might take a while.

If anyone cares....   ;)

JRJ