IBM 1410 FPGA Implementation Update - new github repository
cube1 at charter.net
Mon May 3 07:32:44 CDT 2021
On 5/3/2021 7:15 AM, Tom Hunter via cctalk wrote:
> I think this implementation would give definitive answers to some of the
> obscure corner cases which may not be well documented and thus may not be
> correctly emulated in software. So even if never implemented on an actual
> FPGA this is very valuable.
Yes, that would be a possible "productive" use. For example, I have
seen questions from time to time about what a given 1401 configuration
would actually do in certain situations.
> My Desktop CYBER emulator was implemented in C using the information found
> in the CDC hardware manuals. There was one weird CYBER/6000 series console
> channel problem which we have been able to resolve using a similar
> approach. Paul Koning created a VHDL implementation of a CDC 6400 using
> hand written VHDL code for each cordwood module type and "wired" them
> together by processing the OCRed wire lists generating more VHDL code. He
> used GHDL to execute the VHDL and run some short test code which provided
> the definitive answer to the problem. The CDC manuals did not mention this
> specific corner case.
> Congratulations to Jay for this cool project.
> Best regards
> Tom Hunter
> On Mon, May 3, 2021 at 6:51 AM Chuck Guzis via cctalk <cctalk at classiccmp.org>
>> That's a very ambitious project! I commend you for your determination
>> and thoroughness.
>> I am a bit curious, however. How does this implementation (other than
>> perhaps speed) compare with a software emulation done on a modern CPU?
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