Documentation for F11 Chipset?

Jon Elson elson at
Sat May 15 17:41:32 CDT 2021

On 05/15/2021 05:30 PM, Rob Jarratt via cctalk wrote:
>> -----Original Message-----
>> From: Paul Koning <paulkoning at>
>> Sent: 03 May 2021 19:29
>> To: rob at; Robert Jarratt <robert.jarratt at>;
>> cctalk at
>> Subject: Re: Documentation for F11 Chipset?
>>> On May 3, 2021, at 2:23 PM, Rob Jarratt via cctalk
> <cctalk at>
>> wrote:
>>> Sadly my machine is not at the point where I can attach a console of any
>> kind. The CPU is being reset every 13us by a bus error. I am having
> trouble
>> working out why though. I have got as far as working out that is the CT2
>> OUT signal, but just why that is active isn't entirely clear to me. It
> would help
>> to have a working machine to compare it to!
>>> Regards
>>> Rob
>> That sounds like it's trying to access the boot ROM and not getting an
> answer.
> I have been looking at this and I think you are right. But the reason is
> odd. It looks like the ROMs are never being selected by the ROM address
> decode. I can't find on the printset anything that says what the boot
> address would be, perhaps that is burned into the F11 chipset? However, from
> the Pro technical manual the ROM addresses are in the ranges
> 17730000-17767776, so I think the top 7 bits of the address should all be
> 1s. It looks like I never get anything other than 0s, when the address
> strobe (CT6 RCV AS H on the printset) is asserted. There is activity on the
> F11 chips, so I think they are working.
Are there address line drivers between the F11 and the bus?  
Could either they not be getting an enable or just gone bad?


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