test-drb

test-drb@ccmp.vtda.org

101090 discussions

IBM 1410 FPGA Implementation Update - new github repository

by cube1＠charter.net

The last 12 months I have been pretty busy working on my 1410 in FPGA project, and there is now more to share, though I have not done much actual work since February - been too busy playing with other "toys". 8D First, I finished working through all of the IBM 1410 and IBM 1415 Automated Logic Diagrams - generating VHDL and testing the results with test benches. [Note that this includes the built-in 1401 compatibility mode, activated at the flip of a switch.] That took most of 2020. So, the CPU generation in VHDL is now more or less complete, and I added a hand coded memory module for memory, as core is kind of hard to find on an FPGA development board. ;) I am currently using a Digilent Nexys 4, but I think it might have even fit on a Nexys 2 - there is plenty of room to spare, and there isn't anything in the VHDL aside from, maybe, the memory implementation (though even that is pretty generic VHDL). With this the CPU runs, at the very least, Unconditional branch (Jump), Halt, NOP and Set Word Mark instructions seemingly correctly - I haven't tried any others. Somewhat surprisingly, aside from issues with the hand coded VHDL in triggers and the need to communicate pins tied to logic one or zero, the auto-generated VHDL works untouched. I have updated the github repository for the C# database application that generates the VHDL from time to time (and which includes the complete database) at http://github.com/cube1us/IBM1410SMS There is now a *new* repository, http://github.com/cube1us/IBM1410FPGA which holds the generated VHDL, some hand coded VHDL modules for certain SMS cards (typically for triggers, for example), the console and test benches I used along the way, and VHDL "Integration Tests" which are designed to be loaded onto the board - the current one being IntegrationTest3. There will be, eventually, a third repository which will contain the C# code that "hosts" the IBM 1410 console and peripherals, communicating with the FPGA over a high speed serial over USB connection. I figured out that this should allow me to emulate peripherals without having to resort to sending data over Ethernet, SPI, I2C or the like. I have just started that, so it really isn't at a point that there is much to share. Once I have a console working (which will require a re-do of the console VHDL implementation, which right now communicates in ASCII, but should probably be using BCD), I should be able to pre-load into memory some of the CPU diagnostics, by loading a diagnostic routine into either my 1410 simulator (http://github.com/cube1us/1410), or Richard Cornwell's emulator in SimH and then taking a snapshot of "core" to pre-load into the FPGA. At that point I expect I will be able to test the CPU pretty thoroughly. I hope and expect that will happen this year sometime. Unfortunately, I do not have the ALDs (Automated Logic Diagrams) for the IBM 1414 I/O Synchronizers, but I do have the Instruction Logic Diagrams which should allow me to code VHDL to emulate card, tape and maybe eventually even disk functions, so those might take a while. If anyone cares.... ;) JRJ

4 years, 6 months

Looking for the person I sold an eMachines eOne to at the VCF Swap Meet on April 24

by tony.aiuto＠gmail.com

*I found more related goodies you can have for the shipping. You can reply direct to me or on this thread.*

4 years, 6 months

DEC PDP-11/45 backplane +5 ECO

by fritzm＠fritzm.org

Hi Josh, Among the pictures linked from your message about the H742a parts, there is one picture of you backplane. I have been looking for some time for information about the following 11/45 ECO: > KB11-00001 CODE: D May-72 [ECO] > > Problem: Etch carrying +5V current from Mate-n-Lock pins to backpanel pins is not heavy enough to carry required current. Correction: Run 24AWG wire in parallel with etch on panels which already have Mat-n-Lock assembly installed. Increase thickness of conductor with solder bead if Mate-n-Lock assembly not installed. PDP-11/45 system serial number 101 and later. The wiring arrangements at the top of your backplane look to be a bit different from mine, and I believe you may have this ECO implemented. While you have your backplane out, could I ask that you take some closeups around the Mate-n-Locks along the top? I'd be very interested to see the board traces and the details of the red bus wiring there. Pictures of the toasted 11/45 suggest that the original machine had the older power wiring scheme (distribution panel mounted vertically on back of cabinet instead of horizontally at top of cabinet, etc.) although your KB11A serial number badge is >2000, which is curious...

4 years, 6 months

DEC RF08/RS08 module placement info

by michael.99.thompson＠gmail.com

I sent Josh pictures of the complete RF08/RS08 that John Wilson donated to the RICM. I will send detailed pictures of the RS08<->RF08 cables next week. -- Michael Thompson

4 years, 6 months

Bounces

by binarydinosaurs＠gmail.com

Hi folks, Did anyone else get an email about excessive bounces today? I?ve not changed anything hosting wise forever so this is a bit weird. Cheers, -- Adrian Graham Owner of Binary Dinosaurs, the UK's biggest private home computer collection? t: @binarydinosaurs f: facebook.com/binarydinosaurs w: www.binarydinosaurs.co.uk

4 years, 6 months

DEC RF08/RS08 module placement info

by derschjo＠gmail.com

Hi all -- In addition to the 11/45 project I'm also working on restoring an RF08/RS08 fixed head disk/controller (in the vain hopes of one day running TSS/8 on my PDP-8/I). I have the power supply repaired and running and I'm getting ready to power the logic up (the disc itself will be a project all its own, once it arrives). I'd like to double-check that all the flip chips are in their right places; I have no cause to think they've been shuffled around but I want to be sure. The engineering docs have detailed schematics but no placement chart for the modules themselves. Given enough time with the schematics I could derive this chart but I'm saving that as a last resort. So, two possibilities here: 1) Does anyone know of a document I've overlooked that includes module placement? 2) Can someone with an RF08 and/or RS08 take a few detailed pictures of the logic (from the handle side, of course) so I can compare? (Note: the available RF08/RS08 pictures on the 'net are of the unit currently in my possession, so are not useful in this regard!) Thanks! - Josh

4 years, 6 months

Free assorted manuals

by geniibuntu＠gmail.com

Spring cleaning. Will be recycled otherwise. While most are probably not of interest to this group it's possible someone may want the SCSI related items like the ES-1000C flatbed scanner manual or Yamaha CRW8424SX manual or the Adaptec stuff. I'm in downtown Toronto, Canada. On Freenode IRC my nick is genii imgur gallery of the stuff https://imgur.com/a/USejVEv -- "..we are dwarfs astride the shoulders of giants. We master their wisdom and move beyond it. Due to their wisdom we grow wise and are able to say all that we say, but not because we are greater than they." Isaiah di Trani

4 years, 6 months

DEC PDP-11/45 backplane +5 ECO

by jnc＠mercury.lcs.mit.edu

> From: Eric Smith > The KB11-B (original 11/70) and KB11-C (later 11/70) have essentially > the same changes as from the KB11-A to KB11-D Speaking of which, two of the boards that are different in the KB11-D, from the -A, are _identical_ to boards in the KB11-C - the M8123 ROM & ROM control and the M8132 instruction register decode! (The M8123 is also different from the M8133 board in the KB11-B.) Pretty wierd that the -11/45 and -11/70 CPUs share two boards, but true! (The FP11 boards are the same in both, too.) > It sure would be nice to get backplane wirelists for all four (KB11-A, > -B, -C, and -D). ISTR a previous, un-fulfilled request for the -11/70 wirelist, so it's been missing for a while. We _might_ have the -11/45 wirelist: http://www.bitsavers.org/pdf/dec/pdp11/1145/1145_System_Engineering_Drawing… but it's short (pp. 128-132), so maybe it's not complete)? Two other print sets seem to have the same list: http://www.bitsavers.org/pdf/dec/pdp11/1145/1145_System_Engineering_Drawing… http://www.bitsavers.org/pdf/dec/pdp11/1155/MP00039_1155vol1_Mar76.pdf (pp. 45-49 and pp 131-135 respectively). > Also, I'm looking for a Field Maintenance Print Set for the RH70. Heh. I didn't see it online; the manual: http://www.bitsavers.org/pdf/dec/unibus/CSS-MO-F-5.2-27_RH70_Option_Descrip… is a CSS document, which makes no sense, because the CPU backplane is laid out to have room for four, so it's an integral part of the /70 CPU - so why is it a CSS product? Anyway, the print set listed there seems like it might be a CSS thing, too. I see that the CHM seems to have a set: https://www.computerhistory.org/collections/catalog/102749003 so maybe Al will take pity on us and scan it! I looked in my /70 print set, and although it contains all sorts of odds and ends (including MJ11 prints - which kind of half makes sense, since that was the only main memory option on early /70's), it doesn't have the RH70. (I didn't see the MJ11 prints on BitSavers, so I was thinking I was going to have to scan them, but on further looking I found them on deramp.com.) Noel

4 years, 6 months

11/70 system drawing set

by aek＠bitsavers.org

I just uploaded a drawing set that includes KB11-B and C information to http://bitsavers.org/pdf/dec/pdp11/1170

4 years, 6 months

DEC PDP-11/45 backplane +5 ECO

by jnc＠mercury.lcs.mit.edu

> From: Henk Gooijen > I have the M8120 and 4 M8121 boards (32kW bipolar RAM). It is a bit > weird, but in the 11/55 are also two G114 boards (4kW MOS RAM), IIRC. G114s? Those are the sense/inhibit module from the MM11-U/MJ11. Did you mean G401s? If so, one guess as to what happened there is that the machine used to have two banks of MS11 Fastbus memory, one bipolar, and one MOS, and some of the boards from the MOS bank (the memory control, and maybe some of the matrix boards) got removed? A KB11-[AD] can have two banks of MS11; the only type mixing allowed is that one can be all bipolar, and one all MOS; within each bank they all have to be the same. More here: https://gunkies.org/wiki/MS11_Semiconductor_Memory_System Interesting factoid: the M8110 and M8120 use the same etch. I'm not sure quite what the difference is (the MS11-A MM doesn't say, I couldn't find, and I don't think we have the M8120 engineering drawings, just the M8110); the M8120 has a bunch of ECO wires on it, and maybe there are component changes too. (I don't have an M8110 to compare them directly.) Noel

4 years, 6 months

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

2001

2000

1999

1998

1997

test-drb