I just realized that my reply to Jerome's inquiry
about the
LSI-11 module with five chips was probably wrong.  IIRC, the
LSI-11 chip set consists of the control chip, data chip, and
two MICROMs for the base instruction set.  The EIS/FIS (KEV11)
is a single additional MICROM.  So the original quad-height
LSI-11 module would have four 40-pin chips without the EIS/FIS,
or five with. 
Correct... and with 5 sockets, there would be one left over
for either the EIS/FIS option or WCS, not both.
 Was it the LSI-11/2 half-height module that sometimes
used
a hybrid with two MICROMs?  If so, it was probably the two
microms that implemented the standard instruction set, in
order to leave a socket open for the KEV11. 
Actually, I've seen the dual microm used on both 11/03s and
on 11/2s, as well as on the PDT (I have a couple of those
which have been so modified).  The 3007/3010 chips are
combined into one dual microm.  This would allow boards
with only 4 sockets (like the PDT) to add EIS/FIS.
 On the 11/23 and 11/24, some of the chips were also on
dual-chip
hybrids. 
The FPU chip for the 11/23,24 was a dual carrier chip.  The
CIS option was a hex-carrier chip.  It had 6 of those small
gold chips on it, and spanned two sockets of the 11/23[+]
board.  I don't know if it could go on the 11/24.  (I have a
KDF11-B with one of these chips on it).
                                        Megan Gentry
                                        Former RT-11 Developer
+--------------------------------+-------------------------------------+
| Megan Gentry, EMT/B, PP-ASEL   | email: gentry at 
zk3.dec.com (work) |
| Unix Support Engineering Group |        mbg at 
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