5 Oct
2009
5 Oct
'09
6:57 p.m.
On Oct 5, 2009, at 2:10 PM, Dave McGuire wrote:
On Oct 5, 2009, at 3:39 PM, Geoffrey Reed wrote:
The big difference here is LBA vs. C/H/S addressing. Recall that
the IDE interface is a clone of the register-level programming
interface of the ancient WD1010 MFM hard disk controller chip
family, whose registers are 8 bits wide. There's a register for the
starting sector number (256 sectors), a register for the low byte of
the cylinder address and two bits of another register for the high
part of the cylinder address (meaning it tops out at 1024
cylinders), and half of a register for the head number (meaning 16
heads).
1024 cylinders * 16 heads * 256 sectors * 512 bytes/sector = 2GB
I don't know where any supposed 520MB limit comes from; if someone
can enlighten me there, I'd appreciate it.
It was originally 63 sectors. I was one of the 3 people at IBM who
came up with this scheme (because the controller we had did LBA
addressing so we needed a way to map C/H/S to LBA in a simple way).
We *knew* at the time that this was constraining but we figured that
LBA would be in place before we hit the limit. We were wrong.
TTFN - Guy
What am I
not understanding about the need for this product? I
have about
a half-dozen 8-bit ISA IDE controllers, mostly Seagate branded.
Didn't
think they were particularly rare.
From what this sounds like it is able to talk to large capacity IDE
drives,
presumedly 16-bit IDE drives. The older XT ide controllers by
seagate (that
I had) were limited to a handful of drives that could do 8-bit wide
data
transfers and were very limited capacity wise.