17 Nov
2011
17 Nov
'11
5:05 a.m.
On Nov 16, 2011, at 1:15 PM, Chuck Guzis wrote:
Someone who wants to substitute, say, a CPLD for a bunch of unclocked
TTL is going to have to come up with a clock--and then determine how
that will affect function.
I'm not sure why you are saying this. You don't need a clock to implement
combinatorial
logic in a CPLD, or a FPGA.
There's nothing stopping you from taking two inputs, anding them together and putting
the output
on another pin.
The clock give the software a reference for timing analysis. But it's not required.
-brad