Megan asks:
  Does anyone have any information on the KA630 CNF
board? 
Only what's in the KA630-AA CPU Module User's Guide
  Since I have never actually seen the board (which
plugs into the
 KA630/650 directory), I'd specifically like to know what pins I
 need to connect to establish the processor as the first, second and
 third coprocessor... 
On pages 2-7 and 2-8, it says that switches 7 and 8 of the KA630CNF
preform that function, and that they are wired to KA630-AA J2 pins 4 and 5,
which are called "CPU CD0 L" and "CPU CD1 L".
The switch settings are documented as
KA630CNF switch         7       8       CPU Operation Mode
KA630-AA J2 pin         4       5
                        Off     Off     Arbiter [normal]
                        On      Off     Auxilliary 1
                        Off     On      Auxilliary 2
                        On      On      Auxilliary 3
So I'd guess that if you grounded J2 pin 4, your KA630 would become
Auxilliary 1.  Ground is available on J2 pins 1-3, 6, 12, and 16.
Other switch settings are:
KA630CNF switch         1       Halt Mode
KA630-AA J2 pin         15
                        Off     Disabled
                        On      Enabled
KA630CNF switch         2       3       4       Console Baud Rate
KA630-AA J2 pin         17      18      19
                        Off     Off     Off     300
                        On      Off     Off     600
                        Off     On      Off     1200
                        On      On      Off     2400
                        Off     Off     On      4800
                        On      Off     On      9600
                        Off     On      On      19200
                        On      On      On      38400
KA630CNF switch         5       6       9       10      Power-Up Mode
KA630-AA J2 pin         13      14
                        Off     Off     On      Off     Normal Operation
                        On      Off     On      Off     Language Inquiry Mode
                        Off     On      Off     On      Loopback Test Mode
                        On      On      On      Off     Manufacturing use only,
                                                         bypasses memory test
Notes:
According to the manual, other settings for switches 5, 6, 9, and 10
should not be used.
The manual lists switches 9 and 10 as being connected to KA630-AA J3 pins
3 and 8.  However, I suspect that they are wired such that switch 9 when
off disconnects the normal receive input, and switch 10 when on connects
the loopback.  I don't have prints to confirm this.
The diganostic LEDs are driven by J2 pins 7, 8, 9, and 11, with 11 being
the most significant bit.
+5V is available on J2 pin 20.
+10V is supplied from the BBU (battery) to the TOY (real time clock) via
J2 pin 10.