3 Oct
2016
3 Oct
'16
9:07 a.m.
On Mon, Oct 3, 2016 at 11:37 AM, Noel Chiappa <jnc at mercury.lcs.mit.edu>
wrote:
I should have been more precise, but my point is that this is a non-parity
RAM basic 11/35 system useful for peripheral interfacing and
communications. As is, not good for something like RT11.
b
From: Al
Kossow
Stack Limit
That's there - that's the KJ11.
From: Tony Duell
KW11-L line time clock?
I don't really consider the LTC as a CPU option. It's on the actual UNIBUS,
it's just in a specially wired UNIBUS slot that's only one slot wide, and
only
has BR/G6 and D6/7 wired to it. Yes, in this case that slot is in the CPU,
so
one can make an argument...
Noel