On Sat, Dec 17, 2016 at 2:59 PM, Chuck Guzis <cclist at sydex.com> wrote:
  What perplexed me is that the address of 0000 0 0
specified the first
 bit in byte 0 of word 0, but that same bit was the *high order* bit in
 the corresponding byte and word.  It would seem to make more sense
 reversing the significance of bits in a byte and bytes in a word such
 that the lowest-numbered addresses corresponded to the least-significant
 bits in a word or byte.
 Call it "extreme little endianess".  Does anyone know of such an
 architecture?
 
The IBM 7030 "Stretch" was bit-addressable for integer operations, but not
for floating point or instructions.  It used typical IBM big-endian bit
numbering, with bit 0 being the most significant bit.
The TI TMS34010 and TMS34020 graphics processors were bit-addressable,
though instructions had to be 16-bit aligned. The TMS34010 and the default
mode of the TMS34020 were little-endian, with bit 0 being the least
significant bit.  The TMS34020 has configurable support for big-endian
memory addressing.