Singer System-10

Architecture

Characters

The 6 bits of a character were referred to as 1,2,4,8,Y,Z, corresponding to the ASCII binary weights 1,2,4,8,16,32 respectively. ASCII bits 32 and 128 were discarded in the conversion.

Number Representation

Memory Addressing

Partitions were of 2 types, user and blind. User partitions were controlled by a human interface, ie a keyboard or video terminal. Blind partitions were controlled indirectly, by commands issued from a user partition. Blind partitions were often used to support shared printers, modem interfaces, etc. They could also be used to run background tasks.

The above applies to both Model-20 and Model-21 CPU's. The Model-21 could address extended memory (above 9999), by setting bits in the 'Y' row of a memory address to zero. The resulting Y fields were complemented, and the result taken as a binary base-value, scaled by 10,000. (This was the only use of binary notation in the machine.)

Memory was ferrite-core, with a cycle time of 3.3uS. With a character-serial architecture, it therefore took 33uS to fetch an instruction. There was no pipelining (since almost every function involved a memory access, there was little opportunity).

Address Indexing

Instructions

Each instruction comprised two memory addresses (address, sign, index register), two length values (LA, LB, range 0..9, where 0 denotes 10), and the operation code. In general, these are the source and destination, or operand-1 and operand-2 / destination.

Operations

Write to Disk/Partition: the converse of Read, above.
Write IO: the converse of Read IO.
Write Control (IO) operates similarly to Write IO, however the character mapping from S-10 to ASCII is changed. The characters A..Z now output as the corresponding ASCII control codes. Their effects depend on the IO device selected.

Move Character concatenated the LA, LB values, to get a length of 1..100 characters. This number of characters was copied from address A to B.

Move Numeric takes a numeric string at address A, length LA chars, and copies it (truncating or padding as needed) to address B, new length LB chars. This function serves as the prototype of the arithmetic instructions, below.

In a Branch instruction, the A and B addresses pointed to two alternative branch destinations, and the LA and LB fields designate conditions to be satisfied, for the jump to occur (see table below). If both conditions are satisfied, the A address dominates. S-10 programmers learned a useful instruction: P0PP05nnnn. With the machine in a "Load/Local" state, this instruction could be entered at the keyboard, and the machine would jump to the address nnnn. This could be used to force entry to debugging functions: for example there was a convention that application programs always included a clean-up & exit routine, located at address 1000. The customer's operators (who were not programmers) were taught this dodge: if a program crashes, force Load/Local, then enter P0PP051000 to clean up and exit.

Subroutine calls were made using the LINK mnemonic, which generated condition-code 6 in the instruction. This directs the CPU to store the current instruction address at the given location, rather than branching. The second half of the instruction was generated as an unconditional branch to the subroutine.

Returns were done by moving the link into an index register (if it was not stored there already), then using the index to modify the target of an unconditional branch. Compare tests two character strings, using the same format as Move Character. The result sets the condition flags.

Add uses lengths similarly to Move Numeric, adding the number at A to that at B.

Subtract is similar to Add, but subtracts.

Multiply stored a product at the B address, the length being extended to LA+LB.

Divide I am unsure of the details.

Form Numeric scanned its source string (address A), extracting valid numeric characters (including signs). The result, zero-padded as necessary, was stored at the B address, as a properly-formatted S-10 signed number.

Reference card for S25: a later S-10 derivative. Thanks to Ray Rodrick for this.

Multi-Tasking

 * ATOMIC TEST-AND-SET MUTEX.
 * MUTEX = -1 IF FREE, ELSE OWNER'S PTN. NO. (0..19)
 .USER                          ?? STORED IN USER'S PARTITION
 MYPTN    DM    N2'3'           USER/PARTITION NUMBER
 .COMMON                        REST IS IN COMMON SPACE
 MUTEX    DM    N2              2-DIGIT NUMBER FOR MUTEX
 *
 GETMTX   C     MUTEX,=N2'-1'   TEST IF IT'S FREE
          BHL   GETMTX,GETMTX   LOOP IF IT'S NOT -1 (HIGHER OR LOWER)
          MC    MYPTN,MUTEX     CLAIM THE MUTEX: ATOMIC
          RETURN                MACRO: GENERATES INDEXED JUMP

If the mutex is free, both branches fail, and the code "falls through". In this event, a task-switch cannot occur, since a successful branch is required. Hence the following MC instruction, which claims the mutex, must execute. The succeeding RETURN is implemented as an unconditional branch: this can cause a task-switch, however the mutex has now been taken.

Operating System (LIOCS)

1. Linked Sequential files. These were typically text files, in which each text line corresponded to one record. In text files, the 100 characters were assigned as:
   1. 80 Data (a card image!)
   2. 6 Backward link
   3. 6 Forward link
   4. 8 Date

   This was very inefficient, however it meant that records could be inserted and deleted at will, by manipulating the links. LIOCS provided these functions. The double links made it possible to traverse a file in either direction, besides providing some redundancy which often assisted in repairing damaged files.

   Free disk space was linked into a free-list, using the same format as above. New records were simply pulled from the end of this list, without regard for their physical location on the disk. Files got fragmented quite quickly!

2. Indexed Linked Sequential files. These were ordinary Linked Sequential files, sorted in record-order. An associated Index File, held a binary tree (?) of record keys and their sector addresses. LIOCS functions traversed this tree, entered the main file at the indicated point, and traversed to the matching record (if any). As records were added & deleted to the main file, the index required periodic rebuilding. Indexed and non-indexed files could co-exist in a single pool.
3. Random (?) These were contiguous blocks of disk space, which the user could manage in any way desired. They were often used as workspace by sort utilities, etc.

LIOCS also offered IO functions for serial devices (screens, printers etc.), but we normally omitted these to save overhead, and programmed IO directly. This was not hard, given the way the S-10 MTIOC functioned.

LIOCS was distributed as source-code, in the form of a large macro (some 3000 lines, afair). To generate LIOCS, one wrote a short "stub" assembler program, which included a single call to the LIOCS macro. The parameters to this call configured the various LIOCS features. LIOCS resided in the Common memory area, and operated similarly to a DLL.

Multi-Terminal IO Controller (MTIOC)

Technical Details

2. Sender/Receiver Circuit. (See Fig. 1)

When receiving, the sender is isolated by CR5 and CR7. Amplifiers Zl and Z2 are connected as Schmitt triggers, each having switching levels of + and -lV, referred to the centre tap of Tl. Before receiving data, the circuit is initialised by a short negative pulse at RXINITIALISE, which sets the Schmitts into standard initial conditions. Signal-pulse trains always commence with a departure from 0V to -2.5V at ST.NEG, which is ignored, since the Schmitts are already in the corresponding polarity. The following positive transition fires the Schmitts, defining the start of Bit 1. Data (if enabled) appears at RXDATA as a train of short +ve pulses.

3. Data Formats.

3.1 Data Character (See Fig. 3)

3.2 Acknowledge Burst (1).

3.3 Acknowledge Burst (2).

4. Polling.

4.1 Poll Sequence.

4.2 Poll Character Format.

4.3 Response.

When addressed, a peripheral may answer Load Requests or Service Requests by an ACKl sequence, to initiate the corresponding action in the CPU. Load Request will cause the CPU to issue a Read Control instruction, which will set the "LOAD" indicator (if any) on the selected device (always Channel 0).

Select operations (bit 7 set) must be answered by ACKl within 100mS, or the instruction will be aborted, with CC-4 set (absent device).

5. Input (READ) Operations.

5.1 Selection.

5.2 Data Transmission.

5.3 Status Character.

The format of the Status character is shown at the right.
The Status character is answered by ACKl, and the input operation is terminated. The IOC will then commence a new Poll sequence, testing for Load and Service Requests.

6. Output (WRITE) Operations.

6.1 Selection.

6.2 Data Transmission.

Finally, the IOC sends an EOT character, defining the end of the string. The terminal responds with ACKl, before proceeding to the Status sequence.

6.3 Status Character.

7. Error Control.

If ACK is not received within about l00m S, the character will be re-transmitted (by the IOC or the terminal) up to 4 times. After 5 unsuccessful attempts, the terminal should 'lock up' , until another poll sequence is received, which should reset it. This will cause the IOC to abort the operation, setting CC-4 to the program (persistent transmission error).

Service Requests

Load-Local

Boot-up

The Load/Local initiates a Read Control for 10 characters, however Enter is pressed at once, so no data is supplied. Read instructions fill the unused buffer with spaces, in this case. However, this is a Read Control, so spaces are mapped to zeros. Locations 0000-0009 are hence filled with zeros, and then executed as an instruction. Now "0000000000" is a valid S-10 instruction: Read from disk drive 0, sector 0, to memory 0000-0099. Instruction execution then continues from Location 0010, ie following the disk read instruction (which has now been overwritten). This is, of course, the system bootstrap. From Partition 0, this would reload LIOCS: other partitions reloaded their own start-up code.

Back to Home Page	More System-10 Details	And More