Who recognizes this (UK) architecture (from 1970-1985)?
dave.g4ugm at gmail.com
Thu Jun 16 05:00:48 CDT 2016
I have forwarded this to some ex-Ferranti folks who may be able to help.
The Museum of Science and Industry in Manchester has many of the old
Ferranti papers and there may be some information in their archives, but
much of the technical info went to other buyers.
> -----Original Message-----
> From: cctech [mailto:cctech-bounces at classiccmp.org] On Behalf Of Erik
> Sent: 16 June 2016 09:23
> To: cctech at classiccmp.org
> Subject: Who recognizes this (UK) architecture (from 1970-1985)?
> Hi There,
> I am working on restoration, documentation of a some vintage navigation
> systems from the late 1970ties, which have been designed in the UK. They
> contain an archaic bit-serial computer and I'd be interested if someone on
> list recognizes the architecture and/or can confirm my assumptions:
> The bitserial computer consists of around 300 TTL chips (54xx); it has 8
> instructions and operates on 16 bit memory. The 3 LOWER bits of the opcode
> define the instruction and the HIGHER bits the location (0-31, i.e.
> most other architectures I know have the instruction coded in the MSBs!
> a list of the basic instructions:
> 1 : Load Ac from memory
> 2 : Store Ac to memory
> 3 : Add to Ac
> 4 : Sub from Ac
> 5 : IO-Instructions (32 Channels, there are some special
> channels as 0 loads AC with "0" whereas channel 31 loads
> -1 into Ac).
> 6 : Shift instructions - depending on the address field,
> Ac is shifted arithmetically (preserving MSB, the sign) or
> 7 : Bit test instructions - 0-15 test bits of the Ac register,
> 16-31 test external digital inputs and are used for
> communication with the hardware.
> And finally, put last for didactic reasons:
> 0 : Here we have a bunch of special instructions depending
> on the address field, like selection of memory page,
> conditional jump, loading of data from ROM into the
> Accumulator (Ac), multiply, divide, conditional JUMP,...
> What makes the architecture very unique to me is, that it has
> 32 bit capability, i.e. there is a "double length" flag and if this is
> commands operate on 32 bit (1-6, MUL, DIV).
> Additionally there is a "logic flag" which causes e.g. the instuctions ADD
> SUB to switch to change their operation from ADD/SUB to logic AND/NXOR.
> Apart from this, ROM and RAM are separated (the CPU cann not exe- cute
> code in RAM) and the RAM is segmented in 4 pages of 31 words.
> The machine does not have got a stack, there is no subroutine call and
> one flag used for conditional JUMPs. Via the test in- structions (e.g.
> bit 3, test Ac<0) this flag is modified and a following "Jump if Flag Set"
> causes the conditional JUMP.
> As the navigation system is made by Ferranti I, already had a look at the
> varouos computers made by them (Mark1, Pegasus, Atlas, and Argus). I think
> given the timeline, and the word widths the Argus 600 or 700 architectures
> may be closely related, but the 600's command set is quite different...
> Can anyone out there confirm this? Is a instruction set listing of the
> available somewhere?
> A video on the system can be found fon YouTube although this is not
> the digital computer it may be of interest as it gives a overview on the
> application, the projected map cockpit display (one of the devices
> the system) and it shows my homebrew logger developed durig analysis of
> Interesting in this system is also the delicate mechanics and the mix of
> computing, analog computing (platform stabilization, compensation of cross
> talk errors and anisoelasticity, platform erection, first integration from
> acceleration to speed) and mechanical computing (the ingetration of turn
> happens me- chanically within the gyrsocopes).For this reasons, these
> are the most extraordinary masterpiece of engineering I know...
> Best regards,
> Erik, Germany, Munich...
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