Looking for schematics of QBUS 32KW memory module.
jsw at ieee.org
Sun Sep 8 16:53:03 CDT 2019
On 9/8/19 4:21 PM, Mister PDP via cctalk wrote:
> I guess I should have been a little more specific about the memory issues I
> was having when I made this post. For the most part these issues seem to be
> scattered all about memory. Also, while the XXDP I have been running has
> been catching more or less the same addresses every time I run it, someones
> it misses a few or adds a few new ones. Moreover when the tests are done, I
> can read and write to the addresses using OTD just fine, which makes me
> think the chips that are bad (if they are bad, and it isn't some power
> related issue) are more flaky than dead.
> I put one of the outputs from a run of the XXDP test on a pastebin below.
If the voltage to these chips is not stable or at the correct voltages,
the circuitry to refresh the dynamic memory might fail or read the wrong
data level from the memory cells. Some chips may be more sensitive to
slightly out of spec voltages than others. There of course may be a
pattern in the outputs that suggest that have one or many bad memory
chips, but I haven't zero'ed in on it yet.
I have the same floppy controller sitting on project list for later in
the year, so keep us posted as to your progress.
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