5 May
2025
5 May
'25
3:28 a.m.
On 2025-05-04 3:13 p.m., Martin Bishop via cctalk wrote:
These days microcode works well in FPGAs, RAM access
times of 3 ns without pipelining, and as Xilinx BRAM comes in 1k Wd x 36b quanta eg 108
bits. BRAM and DSP resource permits implementation of pretty much any (array of) mills.
And the architecture can provide a plurality of parallel memories and address generators.
The sort of things which were conveiveable but probably not implementable in the bit slice
days.
FPGA logic is too vendor specific to have portable code. who needs 3 ns
when 5 volt logic levels and simple packaging are more important in my
mind when it comes to vintage equipment.
http://fpgaretrocomputing.org/pdp4x/
Can we still get the chips?
I was thinking of the western digital chip set, that had the PDP 11 or
Pascal in microcode. A version of BASIC could have been developed, had
not Microsoft cornered the basic market.
A final point is that most of the old mens techniques
remain current, Wilkes used microcode ~1950. What changes, is the price point at which
you can reduce to practice.
Martin
Here is $10.00 bribe to support RISC.
Ben.