On 2/23/21 7:43 AM, Joshua Rice wrote:
> Deviant Ollam on Youtube does some fantastic lectures/videos on physical
> security, and makes it horrifyingly clear how pointless locks and
> physical security often is.
Locks, of any type, only keep honest people honest.
Actually stopping would be bad actors is an entirely different problem.
To whit, many locks / enclosures are simply tamper evidence tags.
--
Grant. . . .
unix || die
Message: 5
Date: Mon, 22 Feb 2021 21:45:24 -0600
From: Jon Elson <elson at pico-systems.com>
To: Brad H <unclefalter at yahoo.ca>, General at ezwind.net,
Discussion at ezwind.net:On-Topic and Off-Topic Posts
<cctalk at classiccmp.org>
Subject: Re: MSI 6800 EPROM Software
Message-ID: <60347A54.5070803 at pico-systems.com>
Content-Type: text/plain; charset=UTF-8; format=flowed
On 02/22/2021 01:31 PM, Brad H via cctalk wrote:
> Hi there,
>
> A longshot I'm sure - but I am wondering if anyone familiar with MSI
(Midwest Scentific - SS50 bus system) would happen to have a copy of the
software for their 1702A EPROM burner, I think the model is PR-1. I just
picked one up and am eager to see if I can use it to read/burn 1702As,
something that has been an issue for me for a while now.
>
>
Reading them is pretty easy. BURNING them is crazy. They
need an 80 V power supply, and I think you XOR the address
or something as you apply the programming voltage.
Jon
Actually, programming a 1702 only requires a -48 volt pulse for each
address. Here's the datasheet:
https://www.jmargolin.com/patents/1702a.pdf
Does anyone have a collection of Intel Developers' Insight CD-ROMs in
physical form or as images? The only physical CD-ROMs I have are a two
disk set from February 1998. I don't know what time period these were
available. Maybe mid or late 1990s to early 2000s? They have a variety
of information on them such as datasheets and manuals that might not
always be easy to find online anywhere anymore.
As one example of something that I was recently unable to find online
anywhere is a copy of either of these, which might have been available
on some of the Intel Developers' Insight CD-ROMs:
297372 16-Mbit Flash Product Family User?s Manual
297508 FLASHBuilder Design Resource Tool
Those are mentioned in various Intel flash memory datasheets and
databooks from around the 1995 timeframe.
The February 1998 CD-ROMs contain a copy of the Intel Flash
SOFTWAREBuilder, which appears to be related to but different from the
FLASHBuilder tool.
I dropped by the local e-waste recycler and picked up a Startech 25U
server rack for $100. (This one:
https://cdn.cnetcontent.com/75/26/75261816-2cf3-43e9-a0b3-1e63752d781e.pdf).
Heavy bugger, complete with glass door.
I was as surprised as the guy who helped me load it to find that it
barely fit in a Gen2 Prius (I left the truck at home). It came with an
HP EO4500 PDU, with all 4 power strips (I have no use for this, so if
you do, drop me a line. Maybe we can work out something). They also
tossed in all of the bags of unused parts. But--no keys! Do all
Startech Duraracks use the same key? Anyone know?
--Chuck
Hi there,
A longshot I'm sure - but I am wondering if anyone familiar with MSI (Midwest Scentific - SS50 bus system) would happen to have a copy of the software for their 1702A EPROM burner, I think the model is PR-1. I just picked one up and am eager to see if I can use it to read/burn 1702As, something that has been an issue for me for a while now.
Many thanks,
Brad
Hi all --
Thought you all might be interested in an update, and I'm also looking for
advice in debugging the current issue I'm hitting.
After replacing the clock crystal on the TIG, the system started showing
signs of life, but the Load Address switch would stop working after being
powered on for 10-30 seconds, but would work fine single-stepping via the
KM11. Brought the DAP board out onto the extender for debugging and the
problem went away. Reinstalled the board after cleaning the slot (again)
and the problem hasn't recurred since. First bad backplane connection, I'm
sure it won't be the last.
After this, addresses could be loaded, data could be toggled into memory.
But instructions wouldn't execute; Tracing through the microcode with the
KM11 indicated that the microcode flow was aborting early and returning to
the main console loop (via BRK.90) before the instruction fetch at FET.00;
this was due to the TMCB BRQ TRUE H signal being stuck high. Probing of
the TMC board revealed a bad 74H30 at E70, which had its output stuck at
1.65V or so, just high enough to confuse things.
Now instructions would execute but the PC would contain garbage after
execution of an instruction, after tracing the microcode and staring at the
flow diagrams all signs pointed to the PCB register (twin to the PCA
register that is used for storing PC data) having trouble. Garbage in the
PC after execution was always in bits 6-11, everything else was fine, which
pointed to a 74S174 at H47 on the DAP board. Replaced and now instructions
execute!
Mostly. They seem to execute properly when single-stepping instructions,
or running off the RC clock at a clock rate of about 16-20Mhz, any faster
than that and things stop working correctly. This is what I'm currently
banging my head against -- if anyone has any experience with the 11/70 or
wants to stare at the manuals for a bit (and who doesn't?), I'd appreciate
any extra input.
There are a number of different issues, I'm currently focusing on
two-operand instructions that take an immediate argument (MOV #10, R0, or
ADD #42, R5) for example. The behavior here is a bit befuddling and I
can't quite figure out how it ends up happening, given the microcode.
I'll use ADD as a representative example.
An ADD #10, R0 instruction (followed by HALT) poked in at address 1000
executes properly -- R0 gets 10 -- but afterwards the PC is corrupted: it
contains 2, rather than 1004. In the general case, "ADD #X, R0" ends with
PC containing 2 + <original value of R0>. (MOV shows the exact same
behavior, except that there's no addition, obviously.)
This value of PC is shown in the Address lights, as well as when examining
the register from the front panel (at 17777707).
When single-instruction-stepping the processor this instruction executes
perfectly: R0 gets R0+10, PC is 1004 afterwards (both in the Address lights
and when examining from the front panel). I have verified with my logic
analyzer that when running normally (i.e. not single-stepping) the
microcode executes the proper sequence of instructions -- which is the same
as executed when single-stepping except at the very end: In FLOWS 4, after
the D00.90 instruction executes, a branch is taken to BRK.90, which exits
back to the console loop.
I don't believe there should be any other differences in execution between
the two paths -- other than the branch at the end there are no conditional
branches or conditional operations based on whether the CPU is
single-stepping or not. There's a signal somewhere in there that has just
gone a little bit slow... the trick is finding it.
For reference, the microcode sequence (starting at FET.03, see pg. 5 of
http://bitsavers.org/pdf/dec/pdp11/1170/MP0KB11-C0_1170engDrw_Nov75.pdf) is:
334 (FET.03)
260 (FET.10)
343 (IRD.00)
022 (S13.01)
027 (S13.10)
205 (D00.90)
260 (FET.10)
343 (IRD.00)
010 (HLT.00)
316 (HLT.10)
164 (FET.04)
240 (BRK.90)
352 (BRK.00)
170 (CON.00)
You can see it fetching and executing the ADD instruction, then returning
back to FET.10 and executing the next instruction, which is a HALT
instruction (because all other memory contains 0 at this point). I believe
this is what causes the "+2" portion of the final (incorrect) PC value.
(What's extra odd -- literally -- here is that if you start with a "1" in
R0, the final PC is 3... seemingly indicating a fetch/execution of an
instruction at an odd address, which you'd think would cause a trap
instead...)
I've been staring at this awhile and I'm puzzled; everything seems to
execute properly, the instruction is fetched and decoded, and the immediate
value is fetched, the ALU does the right thing and the result is properly
stored in R0. And then the PC gets screwed up, and I'm not quite sure how
that's possible from looking at the microcode, so I'm not quite sure where
to start looking.
I sort of suspect the PCB register again, as this is related to the
difference in behavior between single-stepping and normal execution: the
branch back to the console loop *doesn't* update PCA from PCB, whereas the
branch back to the fetch / decode loop does.
Anyone have any bright ideas as far as what to poke at?
Thanks as always,
- Josh
> From: Lars Brinkhoff
> Anyone ever heard of the Systems Concepts SC-4 computer?
Given the SF address, and Peter Samson's signature, this is the _the_ Systems
Concepts. Never heard of the SC-4, though.
One oddity: the cover letter is dated 1972, but it talks of "the main G.E.
computer". GE's computer business was sold to Honeywell in 1970, though?
Noel
Curious if anyone on here knows if the contents of any of the earlier
IndiZone CDs from SGI are posted? A copy of IndiZone3 came with my copy
of IRIX 6.2 a number of years ago, and while the games aren't the sort
that would impress a modern XBox user I thought they were kind of neat
and showed off the equipment and thoughts of the 1995-era, but I also
have some earlier SGIs that would be IndiZone 1/2 era. I found a couple
lists of the contest winners (but the CDs have more), and an occasional
download link, but nothing complete for either.
Anyone have links or lists of what was on them?
Anyone ever heard of the Systems Concepts SC-4 computer?
"This is an two's-complement 18-bit machine, with 16 general registers
and a 16 level priority interrupt system. Its programming ascpects
are explained in great detail in the SC-4 Reference Manual, of which a
draft is enclosed. Below are times for some typical instructions.
Add word on stack (not top word) to general register 1.5 us
Multiply general register by memory word 6.2 us
Jump 750 ns
Push and Jump 1.5 us
Compare Immediate 750 ns"
>From page 6 here:
http://people.csail.mit.edu/saltzer/Multics/MHP-Saltzer-060508/filedrawers/…